# This is the template file for creating symbols with tragesym # every line starting with '#' is a comment line. [options] # wordswap swaps labels if the pin is on the right side an looks like this: # "PB1 (CLK)". That's useful for micro controller port labels # rotate_labels rotates the pintext of top and bottom pins # this is useful for large symbols like FPGAs with more than 100 pins # sort_labels will sort the pins by it's labels # useful for address ports, busses, ... wordswap=yes rotate_labels=no #sort_labels=yes #sort_labels=yes generate_pinseq=yes pinwidthvertical=400 pinwidthhorizontal=500 #sym_width=1400 sym_width=4000 [geda_attr] # name will be printed in the top of the symbol # if you have a device with slots, you'll have to use slot= and slotdef= # use comment= if there are special information you want to add version=20081229 3 name=ATmega644 device=IC refdes=U? description=AVR micro 64/2/4 KB numslots=0 footprint=DIL 40 documentation="" author=Robert Olsson dist-license=GPL use-license=public domain #slot=1 #slotdef=1: #slotdef=2: #slotdef=3: #slotdef=4: #comment= #comment= #comment= [pins] # tabseparated list of pin descriptions # pinnr is the physical number of the pin # seq is the pinseq= attribute, leave it blank if it doesn't matter # type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr) # style can be (line,dot,clk,dotclk,none). none if only want to add a net # posit. can be (l,r,t,b) or empty for nets # net specifies the name of the Vcc or GND name # label represents the pinlabel. # negation lines can be added with _Q_ # if you want to add a "_" or "\" use "\_" and "\\" as escape sequences #----------------------------------------------------- #pinnr seq type style posit. net label #----------------------------------------------------- 1 io line l PB0 (PCINT8/XCK0/T0) 2 io line l PB1 (PCINT9/CLKO/T1) 3 io line l PB2 (PCINT10/INT2/AIN0) 4 io line l PB3 (PCINT11/OC0A/AIN1) 5 io line l PB4 (PCINT12/OC0B/\_SS\_) 6 io line l PB5 (PCINT13/MOSI) 7 io line l PB6 (PCINT14/MISO) 8 io line l PB7 (PCINT15/SCK) 9 pwr dot t RESET \_RESET\_ 10 pwr none t Vcc Vcc 11 pwr none t GND GND 12 clk line b XTAL2 13 clk line b XTAL1 14 io line l PD0 (PCINT24/RXD0) 15 io line l PD1 (PCINT25/TXD0) 16 io line l PD2 (PCINT26/INT0) 17 io line l PD3 (PCINT27/INT1) 18 io line l PD4 (PCINT28/OC1B) 19 io line l PD5 (PCINT29/OC1A) 20 io line l PD6 (PCINT30/OC2B/ICP) #sort_labels=no 30 io line t AVcc AVcc 31 pwr none t GND GND 32 in line t AREF AREF 40 io line r PA0 (ADC0/PCINT0) 39 io line r PA1 (ADC1/PCINT1) 38 io line r PA2 (ADC2/PCINT2) 37 io line r PA3 (ADC3/PCINT3) 36 io line r PA4 (ADC4/PCINT4) 35 io line r PA5 (ADC5/PCINT5) 34 io line r PA6 (ADC6/PCINT6) 33 io line r PA7 (ADC7/PCINT7) 29 io line r PC7 (PCINT23/TOSC2) 28 io line r PC6 (PCINT22/TOSC1) 27 io line r PC5 (PCINT21/TDI) 26 io line r PC4 (PCINT20/TDO) 25 io line r PC3 (PCINT19/TMS) 24 io line r PC2 (PCINT18/TCK) 23 io line r PC1 (PCINT17/SDA) 22 io line r PC0 (PCINT16/SCL) 21 io line r PD7 (PCINT31/OC2A)